;@
;@ Initialisation du bootloader.
;@ Voici se qui est fait dans l'ordre :
;@ - Création des piles
;@ - Création des la tables des interruptions
;@ - Appel de kmain(), qui se charge de la suite.
.section .init
Reset:			ldr pc, reset_add
Undefined:		ldr pc, undefined_add
SWI:			ldr pc, swi_add
PrefetchAbort:	ldr pc, prefetch_abort_add
DataAbort:		ldr pc, data_abort_add
NotAssigned:	ldr pc, not_assigned_add
IRQ:			ldr pc, irq_add
FIQ:			ldr pc, fiq_add
;@
reset_add: 			.word _reset_handler
undefined_add:		.word _undefined_handler
swi_add:			.word _swi_handler
prefetch_abort_add:	.word _prefetch_abord_handler
data_abort_add:		.word _data_abort_handler
not_assigned_add:	.word _not_assigned_handler
irq_add:			.word _irq_handler
fiq_add:			.word _fiq_handler
;@
;@
.section .text
;@ Reset
_reset_handler:
	;@ On désactive les IRQ et FIQ
	mrs r0, cpsr
	orr r0, r0, #0xC0
	msr cpsr_c, r0
	;@ Création de la pile du supervisor
	ldr sp, =0x10080000
	;@ On créer la pile du mode FIQ
	mov r0, #0x11
	msr cpsr_c, r0
	ldr sp, =0x2000
	;@ On créer la pile du mode IRQ
	mov r0, #0x12
	msr cpsr_c, r0
	ldr sp, =0x4000
	;@ On créer la pile du mode abort
	mov r0, #0x17
	msr cpsr_c, r0
	ldr sp, =0x6000
	;@ On créer la pile du mode Undefined
	mov r0, #0x1B
	msr cpsr_c, r0
	ldr sp, =0x8000
	;@ On revient en mode supervisor
	mov r0, #0x13
	msr cpsr_c, r0
	;@ On créer la table des interruptions
	ldr r0, =0x10000000
	mov r1, #0x0
	ldmia r0!, {r2, r3, r4, r5, r6, r7, r8, r9}
	stmia r1!, {r2, r3, r4, r5, r6, r7, r8, r9}
	ldmia r0!, {r2, r3, r4, r5, r6, r7, r8, r9}
	stmia r1!, {r2, r3, r4, r5, r6, r7, r8, r9}
	;@ On passe la main à kmain
	b kmain
;@ Undefined
_undefined_handler:
	stmfd sp!, {r0-r12, lr}
	bl exception_handler
	ldmfd sp!, {r0-r12, lr}
	movs pc, lr
;@ SWI
_swi_handler:
	stmfd sp!, {r0-r12, lr}
	bl exception_handler
	ldmfd sp!, {r0-r12, lr}
	movs pc, lr
;@ Prefetch Abort
_prefetch_abord_handler:
	stmfd sp!, {r0-r12, lr}
	bl exception_handler
	ldmfd sp!, {r0-r12, lr}
	subs pc, lr, #4
;@ Data Abort
_data_abort_handler:
	stmfd sp!, {r0-r12, lr}
	bl exception_handler
	ldmfd sp!, {r0-r12, lr}
	subs pc, lr, #4
;@ Not assigned
_not_assigned_handler:
	stmfd sp!, {r0-r12, lr}
	b exception_handler
;@ IRQ
_irq_handler:
	stmfd sp!, {r0-r12, lr}
	bl exception_handler
	ldmfd sp!, {r0-r12, lr}
	subs pc, lr, #4
;@ FIQ
_fiq_handler:
	stmfd sp!, {r0-r7, lr}
	bl exception_handler
	ldmfd sp!, {r0-r12, lr}
	subs pc, lr, #4
